Minutes, IBIS Quality Committee 08 May 2007 11-12 AM EST (8-9 AM PST) ROLL CALL Adam Tambone Barry Katz Benny Lazer Benjamin P Silva * Bob Ross, Teraspeed Consulting Group Brian Arsenault * David Banas, Xilinx * Eckhard Lenski Eric Brock Gregory R Edlund Hazem Hegazy John Figueroa John Angulo Katja Koller Kevin Fisher * Kim Helliwell, LSI Logic * Lance Wang, IOMethodology Lynne Green * Mike LaBonte, Cisco * Moshiul Haque, Micron Technology Peter LaFlamme Radovan Vuletic, Qimonda Robert Haller * Roy Leventhal, Leventhal Design & Communications Sherif Hammad Todd Westerhoff Tom Dagostino Kazuyoshi Shoji Sadahiro Nonoyama Everyone in attendance marked by * NOTE: "AR" = Action Required. -----------------------MINUTES --------------------------- Mike LaBonte conducted the meeting. New items: - Corrections needed for 24 Apr 2007 minutes: - Change meeting date from "17 Apr 2007" to "24 Apr 2007" - "2D or 3D field solver" AR was inserted erroneously - Should we strike it? - It will be left intact - Presentations for the upcoming IBIS summit : - David will present Roy's slides on correlation and his own slides on a 5 metric system. - David and Roy will conference on this - Mike will give a short IQ status presentation AR: Mike prepare IQ status presentation for IBIS summit - David asked about the relationship of Vth to AC/DC thresholds - Which to use for SSTL? - The IBIS spec indicates that [Receiver Thresholds] Vth, Vth_min and Vth_max should be used - The SSTL spec indicates that [Receiver Thresholds] Vinh_dc and Vinl_ac should be used (for falling edges) - The gate remains switched once the threshold is crossed - Moshiul said that sometimes shifts in internal or external reference voltages are responsible for these effects - Bob said the symbol is Vth in JEDEC data sheets, and this can be confusing - How does the EDA tool pick which parameters to use? - It doesn't know the technology - Bob said some parameters override others, if present - Bob explained that both sets of parameters should be present - Vth gives absolute voltage - All others are relative to Vth - Mike suggested that this would be a good topic for the IBIS open forum - IQ 4.2.20 says: - Vinh_ac, Vinl_ac overrides the Vinh and Vinl defined earlier in the [Model] or [Model Spec] section. - Bob said that this is incorrect - There was some discussion about what OPTIONAL means, but no conclusion - [Receiver Thresholds] is covered in IQ checks 4.2.18 to 4.2.25 - We talked about whether to jump to that section next, or continue or specification review linearly - If we jump around we will have to carefully track what has been covered. - The urgency of this issue is not clear - Next week we will hear research from David and decide on this - Mike will insert markers if we jump ahead AR: David research [Receiver Thresholds] issues AR Review: - Mike update title line for 3.2.5 to match that provided by Kim - Done - Mike remove "2D or 3D field solver" sentence from 3.2.5 - Not done. Kim believed that this AR was not agreed during the meeting. - We agreed to leave the sentence intact - Mike delete check 3.3.1 - Done - Mike change 3.3.2 to level 3 - Done Continued review of IQ specification 1.1p: - Review of new changes to 3.2.5 - Mike has inserted a new sentence: "To pass this check the RLC values must be present for all signal pins in the [Pin] section, even if [Package Model] is present." - The idea is that RLC values help to check the model and to perform simple calculations such as package skew, even if they are not needed for simulation. - Bob felt that this should be inverted, that [Package Model] relieves the necessity to have [Pin] RLC - There was agreement on this - The remainder of the section was acceptable Mike will not issue a new document revision since little has changed. Next meeting: 15 May 2007 11-12 AM EST (8-9 AM PST) Phone: 1.877.384.0543 or 1.800.743.7560 Passcode: 90437837 Meeting ended at 12:16 PM Eastern Time.